1. Field of Invention
The inventive principles of this patent disclosure relate to a semiconductor device, and more particularly, to a fuse circuit used in a semiconductor device.
2. Description of the Related Art
Fuse circuits are connected to other circuits in semiconductor devices to indicate whether the other circuits are usable. For example, if a fuse in a fuse circuit is cut, it indicates that a predetermined circuit connected to the fuse circuit is capable of operating. On the other hand, if the fuse is not cut, it indicates that the predetermined circuit is not capable of operating. An example of this type of fuse circuit is disclosed in U.S. Pat. No. 6,215,336.
FIG. 1 is a circuit diagram of a conventional fuse circuit, FIG. 2A is a diagram illustrating the waveforms of signals input to and/or output from the conventional fuse circuit illustrated in FIG. 1 when a fuse F1 is not cut, FIG. 2B is a diagram illustrating the waveforms of the signals input to and/or output from the conventional fuse circuit illustrated in FIG. 1 when the fuse F1 is cut, and FIG. 2C is a diagram illustrating the waveforms of the signals input to and/or output from the conventional fuse circuit illustrated in FIG. 1 when a leakage current path exists through the fuse F1 due to resistance components left by a cutting operation.
Referring to FIGS. 1 through 2C, when the conventional fuse circuit is powered up, a control signal VCCHB ramps up to a predetermined voltage by following a power supply voltage VDD. Once the control signal VCCHB reaches the predetermined voltage, the voltage of the control signal VCCHB is driven as low as a ground voltage VSS.
An operation of the conventional fuse circuit illustrated in FIG. 1 will now be described in detail. When the control signal VCCHB exceeds a threshold voltage of an NMOS transistor N1 by following the power supply voltage VDD, the NMOS transistor N1 is turned on, and a node CUT_OR_NOT is driven to the ground voltage VSS. When the node CUT_OR_NOT is at the ground voltage VSS, a fuse state information signal FUSE_OUT is driven to the power supply voltage VDD. Then, the fuse state information signal FUSE_OUT turns on an NMOS transistor N2, thereby maintaining the voltage of the node CUT_OR_NOT at the ground voltage VSS.
When the control signal VCCHB reaches the predetermined voltage while following the power supply voltage VDD and then drops to the ground voltage VSS, the NMOS transistor N1 is turned off, and a PMOS transistor P1 is turned on. At this time, if the fuse F1 is not cut as illustrated in FIG. 2A, the voltage of the node CUT_OR_NOT is driven as high as the power supply voltage VDD due to the fuse F1 and the PMOS transistor P1. Accordingly, the voltage of the fuse state information signal FUSE_OUT is driven as high as the ground voltage VSS. When the fuse state information signal FUSE_OUT is at the ground voltage VSS, it indicates that the fuse F1 is not cut.
On the other hand, if the fuse F1 is cut as illustrated in FIG. 2B, the voltage of the node CUT_OR_NOT is maintained at the ground voltage VSS even if the PMOS transistor P1 is turned on, and accordingly, the voltage of the fuse state information signal FUSE_OUT is maintained at the power supply voltage VDD. When the fuse state information signal FUSE_OUT is at the power supply voltage VDD, it indicates that the fuse F1 is cut.
However, even when the fuse F1 is cut, residues of the fuse F1 may still remain for various reasons. In this case, due to the fuse residues, resistance components may be generated, thereby forming a leakage current path between the PMOS transistor P1 and the NMOS transistor N2. This causes unnecessary leakage current to flow through the leakage current path. Therefore, the node CUT_OR_NOT may have an indefinite voltage between the ground voltage VSS and the power supply voltage VDD.